Complete ts-72xx specific flash register map

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CompleteTS-72XXSpecificFlash+RegisterMap <verbatim> /'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''* Copyright (C) 2005 by Curtis Monroe curtis@... This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''*/

// this file defines the TS7200 registers located in region // 0x10000000 - 02ffffff

// usualy only address bits ADD22-25 are used for this region, giving // a total of 16 registers, address bits 21-0 are ignored. This // causes the register to be mirrored in these locations. // // usualy data bits 00-02 are used for this region, giving a total // of 8 possible values (or 3 bits) for each register, but some registers // use all 8 bits

//----------------------------------------------------------------------------- // 0x1000-0000 to 0x13CF-FFFF range //-----------------------------------------------------------------------------

  1. define TS7200_REG100 0x10000000

/ 11000001 - 11000007: IDE 8-bit registers /

  1. define TS7200_REG104 0x10400000

/ 10400006 - 10400007: aux IDE 8-bit registers /

  1. define TS7200_REG108 0x10800000

// bit 0 = JP2 // Console enable and A/D option installed // bit 1 = JP3, VPEN // Write enable flash and eeprom // bit 2 RESERVED (default0) // bit 3 = JP4# // Stop at redboot // bit 4 = JP5# // TS_Test/TCK // bit 5 = FLASH_BUSY# // bit 6 = UART1_DCD // bit 7 = ADC_RDY#

  1. define TS7200_REG10C 0x10C00000
  1. define TS7200_REG110 0x11000000
  1. define TS7200_REG114 0x11400000
  1. define TS7200_REG118 0x11800000

// ISA memory area 0x11C00000 ?????

  1. define TS7200_REG11C 0x11C00000
  2. define TS7XXXTTYS0 (TS7200REG11C + 0x03F8)
  3. define TS7XXXTTYS1 (TS7200REG11C + 0x02F8)
  4. define TS7XXXTTYS2 (TS7200REG11C + 0x03E8)
  5. define TS7XXXTTYS3 (TS7200REG11C + 0x02E8)
  6. define TS7XXXTTYS4 (TS7200REG11C + 0x03A8)
  7. define TS7XXXTTYS5 (TS7200REG11C + 0x02A8)


  1. define TS7200_REG120 0x12000000
  1. define TS7200_REG124 0x12400000
  1. define TS7200_REG128 0x12800000
  1. define TS7200_REG12C 0x12C00000
  1. define TS7200_REG130 0x13000000
  1. define TS7200_REG134 0x13400000
  1. define TS7200_REG138 0x13800000
  1. define TS7200_REG13C 0x13C00000

// TS-7300 FPGA Cyclone2 programing data register // see http://groups.yahoo.com/group/ts-7000/message/1888 // // data location for programing the TS-7300 (Unreleased board?)

  1. define TS7200_REG13C1 0x13C00001

// TS-7300 FPGA Cyclone2 programing control register // // bit 0 = (0) finished loading data stream // (1) not finished loadinf data stream // // bit 1 = (0) reset TS-7300 (wait 30uSec) // (1) normal operation (wait 80uSec) // // bit 2 = (0) bitstream not loaded // (1) TS-7300 Altera bitstream loaded into a TS-7300 Cyclone2 FPGA

//----------------------------------------------------------------------------- // 0x2000-0000 to 0x23C-FFFF range //-----------------------------------------------------------------------------

  1. define TS7200_REG200 0x20000000
  1. define TS7200_REG204 0x20400000
  1. define TS7200_REG208 0x20800000
  1. define TS7200_REG20C 0x20C00000
  1. define TS7200IDE16BASE 0x21000000

/ 21000000 - 21000001: IDE 16-bit data register /

  1. define TS7200_REG214 0x21400000
  1. define TS7200_REG218 0x21800000
  1. define TS7200_REG21C 0x21C00000
  1. define TS7200_MODEL 0x22000000

// val 0x00 = TS7200 // val 0x01 = TS7250

  1. define TS7200_STATUS 0x22400000 // read only

// bit 0 = JP2 // Console enable and A/D option installed // bit 1 = JP3, VPEN // Write enable flash and eeprom // bit 2 RESERVED (default0) // bit 3 = JP4# // Stop at redboot // bit 4 = JP5# // TS_Test/TCK // bit 5 = FLASH_BUSY# // bit 6 = UART1_DCD // bit 7 = ADC_RDY#

  1. define TS7200_STATUS2 0x22800000

// bit 0 JP6 // reserved, 1no jumper, 0=jumper set // bit 1 = Booting from TS-9420 // "Blaster" board // bit 2 = TS-9420 present

  1. define TS7200COM2MODE 0x22C00000

// val 0x00 = RS-232 // val 0x01 = Full-Duplex RS-485 // val 0x02 = Resrved // val 0x03 = Resrved // val 0x04 = Half-Duplex 9600 baud // val 0x05 = Half-Duplex 19.2K baud // val 0x06 = Half-Duplex 57.6K baud // val 0x07 = Half-Duplex 115.2K baud

  1. define TS7200COM2MODE2 0x23000000

// bit 0 = Half-Duplex 8-data 2-stop-bits // bit 1 = EEPROM Chip Select enable

  1. define TS7200_PLDREV 0x23400000

// might be the CPLD REVISON NUM?

  1. define TS7200WATCHDOGCTRL 0x23800000 // read/write

// must feed watchdog less than 30uSecs before writing this reg // val 0x00 = watchdog disabled // val 0x01 = 250 mSec watchdog reset counter // val 0x02 = 500 mSec watchdog reset counter // val 0x03 = 1000 mSec watchdog reset counter // val 0x04 = reserved // val 0x05 = 2000 mSec watchdog reset counter // val 0x06 = 4000 mSec watchdog reset counter // val 0x07 = 8000 mSec watchdog reset counter

  1. define TS7200WATCHDOGFEED 0x23C00000 // write only

// val 0x05 = feed the watchdog to restart the reset counter // bit 2 = pulses at 32kHz (I think)


//----------------------------------------------------------------------------- // 0x6000-0000 to 0x60FF-FFFF range NOR FLASH TS-9420 BLASTER BOARD PRESENT //----------------------------------------------------------------------------- // 0x6000-0000 - 0x6061-FFFF : 6272 KB reserved // 0x6000-0000 - 0x6001-FFFF : 128 KB TS-BOOTROM // 0x6002-0000 - 0x6061-FFFF : 6144 KB LINUX // 0x6062-0000 - 0x6065-FFFF : 256 KB RedBoot // 0x6066-0000 - 0x6071-FFFF : 768 KB zimage // 0x6072-0000 - 0x607B-FFFF : 640 KB // 0x607C-0000 - 0x607C-0FFF : 4 KB RedBoot config // 0x607C-1000 - 0x607D-FFFF : 124 KB // 0x607E-0000 - 0x607F-FFFF : 128 KB FIS directory // 0x6080-0000 - 0x60FF-FFFF : 8192 KB JFFS2 File System //--------------------------------------------------------------------------- // TOTAL 16384 KB = 16 MB

// 0x60E2-0000 - 0x60E2-0003 = "SURC" (for 16MB flash) // 0x607C-030A - 0x607C-030F = MAC ADDRESS (for 8MB flash) // 0x60FC-030A - 0x60FC-030F = MAC ADDRESS (for 16MB flash)



//----------------------------------------------------------------------------- // NAND FLASH TS-7250 32MB version (part # NAND256W3A0AN6 ) //----------------------------------------------------------------------------- // 0x0000-0000 - 0x0000-3FFF : 16 KB "TS-BOOTROM" // 0x0000-4000 - 0x01D0-3FFF : 29696 KB "Linux" (29 MB) // 0x01D0-4000 - 0x01FF-FFFF : 3056 KB "RedBoot" (3 MB - 16 KB) //--------------------------------------------------------------------------- // TOTAL 32768 KB = 32 MB



//----------------------------------------------------------------------------- // NAND FLASH TS-7250 128MB version (part # NAND01GW3A0AN6 ) //----------------------------------------------------------------------------- // 0x0000-0000 - 0x0000-3FFF : 16 KB "TS-BOOTROM" // 0x0000-4000 - 0x07D0-3FFF : 128000 KB "Linux" (125 MB) // 0x07D0-4000 - 0x07FF-FFFF : 3056 KB "RedBoot" (3 MB - 16 KB) //--------------------------------------------------------------------------- // TOTAL 131072 KB = 128 MB </verbatim>

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